Smart Cameras join image sensing and processing in a unique system. Within smart cameras, embedded systems are deployed to extract high level image features with (pixel-wise) computational intensive operations. Given the limited computational capabilities of embedded devices, FPGA architectures are well suited to speed-up the processing performance. Such architectures are able to perform high throughput processing within a modular and flexible approach. However, one of the biggest issues is the important development time compared to conventional computer vision techniques.
Node programmability and algorithm transcription becomes a major concern for FPGA developers. Low-level programming languages such as VHDL or Verilog constrain designers of computer vision systems to manage the whole internal circuitry (communication drivers, modules synchronization, interfaces...) of their system. In a context of growing productivity gaps, the reduction of system development time is an ever greater concern. A higher level description is necessary to abstract low-level hardware considerations and increase added value.
In this work we propose the GPStudio toolchain. GPStudio solves low-level hardware concerns. The developer can then concentrate on the porting of algorithms into the target hardware architecture. By leveraging the modular architecture concept, available Intellectual Properties (IP) modules can be instantiated with standard interfaces between sensors, processing and communication blocks. In this way, a cross-platform IP library is proposed to improve code re-usability for a wide range of smart camera applications. Once the application is defined, GPStudio automatically generates the architecture and the glue code for the targeted board.Acces to download
After two years of development, GPStudio has reached a sufficient maturity to stimulate rapid FPGA deployment using in-library and/or custom defined modules. With the generated GPStudio debug facilities, the FPGA development has never been so easy!